1. Field of the Invention
The present invention refers to circuits and methods for transmitting a signal, and in particular to circuits and methods which can be used for transmitting a signal within a chip, within a circuit module or a PLL circuit. Basically the present invention refers to adjustable delay circuits being very widely used in a modern chip and system design, like a PLL, DLL (Delay Locked Loop) or OCD (Off Chip Driver).
2. Description of the Related Art
Current semiconductor chips or circuit boards comprise a plurality of high-speed signals. For the proper functionality of a circuit, an accurate arrival time of a signal at a receiver is very important. The arrival time depends for example on the length of a signal path, capacitances or cross-talk between neighboring signal lines.
In modern integrated circuits or system designs very often arises the problem of an accurate aligning of data and strobe signals in order to provide an optimal receiving condition. The optimal receiving condition usually means placing the strobe in the middle of the bit-time of binary data. To achieve the alignment of the strobe signal in the middle of the bit-time of binary data, there is often a time-shift necessary. Normally, the insertion of additional capacitance into a signal path or a layout option which allows passing a signal through traces with different lengths is used for a time shift of a signal. Another possibility for a time shift of a signal is to insert an inverter chain into the signal path. Inverters allow a time delay by steps of approximately 50 ps which is not fine enough for many designs.
The present methods for shifting a signal are often difficult to realize, have a bad influence on the signal quality, are difficult to adjust or do not provide a possibility to adjust a time shift of the signal during the operation of a circuit. Therefore, the arrival time of a signal at a receiver is often not accurate enough to provide a secure transmission of a signal information.